1. Field of the Invention
The present invention relates to a semiconductor memory device (e.g., flash memory) having a multi-value memory region and a two-value memory region on the same chip.
2. Description of the Related Art
Conventionally, electronic apparatuses are generally provided with a semiconductor memory device for storing a control program, which controls the operation of an electronic apparatus, or various data (e.g., audio data or image data).
Recently, a mobile telephone service in which image data can be transmitted and received in addition to character data has been opened. Such a service is partly achieved by the increasing capacity of a flash memory mounted on a mobile telephone apparatus. Set top boxes (STBs), such as BS digital tuners and the like, also have a large-capacity flash memory. The proportion of the price of a memory relative to the price of a whole system is increasing. Therefore, there is a demand for less expensive memories.
In these circumstances, multi-value main memory technology is advancing to provide low-cost large capacity memories. The multi-value main memory technology permits each memory cell to store 2 bits or more of data (multi-value data) instead of one bit of data (two-value data). For example, when 2 bits of data (four-value data) are stored in a single memory cell, a memory cell array occupying the same area may have a two-fold larger capacity of data than a conventional two-value array. Therefore, the cost per unit memory capacity can be reduced.
For example, Japanese Laid-Open Publication No. 2001-202788 discloses a semiconductor memory device having a multi-value memory region and a two-value memory region on the same chip in order to achieve high reliability in high-speed access applications.
In the semiconductor memory device disclosed in Japanese Laid-Open Publication No. 2001-202788, a memory cell array on a chip is divided into a plurality of regions. Each segmental region may be arbitrarily set to be a four-value memory region or a two-value memory region. The two-value memory region has a small capacity, but data may be read from the two-value memory region at high speed. In the two-value memory region, a control program or the like is stored. The four-value memory region has a large capacity and is used to store various data.
The potential of a selected memory cell is generated by current-voltage conversion of a current flowing through the cell. In the four-value memory region, a four-value sense amplifier is used to compare the potential of a selected memory cell with reference potentials in order to read data from the cell. In the two-value memory region, a two-value sense amplifier is used to compare the potential of a selected memory cell with a reference potential in order to read data from the cell.
The four-value sense amplifier for reading data from a memory cell in the four-value memory region is separately provided from the two-value sense amplifier for reading data from a memory cell in the two-value memory region.
Japanese Laid-Open Publication No. 7-281952 discloses a semiconductor memory device having a plurality of memory regions (blocks). This semiconductor memory device comprises a delete/write/read control section which allows separate memory blocks to simultaneously perform two or more different memory operations selected from a plurality of predetermined memory operations (e.g., data delete, data write, and data read).
The delete/write/read control section determines whether or not data is being deleted from a predetermined memory block and whether or not data is being written into the predetermined memory block. When data is not being deleted from the predetermined memory block and data is not written into the predetermined memory block, the delete/write/read control section permits the reading of data from the predetermined memory block.
The delete/write/read control section also determines whether or not data is being deleted from a predetermined memory block. When data is not being deleted from the predetermined memory block, the delete/write/read control section permits the writing of data into the predetermined memory block.
The delete/write/read control section determines whether or not data is being written into a predetermined memory block. When data is not being written into the predetermined memory block, the delete/write/read control section permits the deletion of data stored in the predetermined memory block.
In the semiconductor memory device of Japanese Laid-Open Publication No. 2001-202788, the sense amplifiers (i.e., the four-value sense amplifier and the two-value sense amplifier) cannot simultaneously read data stored in a memory cell of the four-value memory region and data stored in a memory cell of the two-value memory region. Therefore, when one of the sense amplifiers is being used to read data, the other sense amplifier is not used and is wasted.
In the semiconductor memory device (e.g., flash memory) of Japanese Laid-Open Publication No. 2001-202788, particularly when a user sets a portion of a memory cell array to be a four-value memory region and the remaining portion of the memory cell array to be a two-value memory region, there is consistently an unused portion in the memory device (i.e., a two-value sense amplifier or a four-value sense amplifier). Therefore, there is a large waste of chip size and power consumption.
In the semiconductor memory device of Japanese Laid-Open Publication No. 7-281952, the reading of data from a plurality of memory regions (memory blocks) and the writing of data into a plurality of memory regions can be simultaneously performed. However, Japanese Laid-Open Publication No. 7-281952 does not describe a multi-value memory region and a two-value memory region. Japanese Laid-Open Publication No. 7-281952 does not relate to a semiconductor memory device having a multi-value memory region and a two-value memory region on the same chip.